Documentation

Bit Reduce

AND, OR, or XOR bit reduction on all input signal bits to single bit

Library

HDL Coder / HDL Operations

Description

TheBit Reduceblock performs a selected bit-reduction operation (AND, OR, or XOR) on all the bits of the input signal, for a single-bit result.

Parameters

Reduction Mode

指定了减少操作:

AND(default): Perform a bitwise AND reduction of the input signal.
OR: Perform a bitwise OR reduction of the input signal.
XOR: Perform a bitwise XOR reduction of the input signal.

Ports

The block has the following ports:

Input

Supported data types: Fixed-point, integer (signed or unsigned), Boolean
Minimum bit width: 2
Maximum bit width: 128

Output

Supported data type:ufix1

See Also

Bit Shift|Bit Concat|Bit Rotate|Bit Slice

Introduced in R2014a

Was this topic helpful?

Simulink Documentation

万博1manbetx

Try MATLAB, Simulink, and Other Products