Documentation

Dot Product

Generate dot product of two vectors (HDL Coder)

Description

The Dot Product block is available with Simulink®.

For information about the simulation behavior and block parameters, seeDot Product.

HDL Architecture

Architecture Description
Linear(default)

Generates a linear chain of adders to compute the sum of products.
Tree

Generates a tree structure of adders to compute the sum of products.

HDL Block Properties

ConstrainedOutputPipeline

Number of registers to place at the outputs by moving existing delays within your design. Distributed pipelining does not redistribute these registers. The default is 0. See alsoConstrainedOutputPipeline.

InputPipeline

Number of input pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See alsoInputPipeline.

OutputPipeline

Number of output pipeline stages to insert in the generated code. Distributed pipelining and constrained output pipelining can move these registers. The default is 0. See alsoOutputPipeline.

Introduced in R2014a

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HDL Coder Documentation
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